A self tuning system for on-die terminators in current mode off-chip signaling

Author

López-Delgadillo, E. ; Díaz-Méndez, J.A. ; García-Andrade, M.A. ; Magana, M.E. ; Maloberti, F.

Author_Institution

Nat. Inst. for Astrophys., Opt. & Electron. (INAOE), Tonantzintla, Mexico

fYear

2009

fDate

2-5 Aug. 2009

Firstpage

102

Lastpage

105

Abstract

A system for self tuning of on-die terminators in current mode off-chip signaling is presented. The proposed method is based on an algorithm that uses the sign of the impedance matching error and the sign of the coupling branch current to perform the self tuning operation. The circuit implementation of the system is described and computer simulations at the transistor level are presented for process, temperature and load impedance variations.

Keywords

circuit tuning; current-mode circuits; impedance matching; integrated circuit design; circuit implementation; coupling branch current; current mode off-chip signaling; impedance matching error; integrated circuit technologies; load impedance variations; on-die terminators; process variations; self tuning system; temperature variations; transistor level computer simulation; Circuit optimization; Degradation; Driver circuits; Frequency; Impedance matching; Integrated circuit interconnections; Power transmission lines; Resistors; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. MWSCAS '09. 52nd IEEE International Midwest Symposium on

Conference_Location

Cancun

ISSN

1548-3746

Print_ISBN

978-1-4244-4479-3

Electronic_ISBN

1548-3746

Type

conf

DOI

10.1109/MWSCAS.2009.5236143

Filename

5236143