• DocumentCode
    3334575
  • Title

    Rapid Design Space visualisation through hardware/software partitioning

  • Author

    Spacey, Simon A. ; Luk, Wayne ; Kelly, Paul H J ; Kuhn, Daniel

  • Author_Institution
    Dept. of Comput., Imperial Coll. London, London
  • fYear
    2009
  • fDate
    1-3 April 2009
  • Firstpage
    159
  • Lastpage
    164
  • Abstract
    This paper introduces the 3SP Design Space Exploration System. 3SP automatically quantifies acceleration opportunities for programs across a wide range of heterogeneous architectures to allow designers to identify promising implementation platforms before investing in a particular hardware/ software codesign. 3SP uses a novel program execution model to integrate comprehensive hardware characteristics including clock speed, number of execution units, issue rates, bandwidths and latencies with software program execution, parallelism, control and data flow measurements to estimate codesign performance for evaluating opportunities for hardware acceleration.
  • Keywords
    data flow analysis; hardware-software codesign; logic partitioning; 3SP design space exploration system; clock speed; codesign performance; comprehensive hardware characteristics; data flow measurements; hardware acceleration; hardware/ software codesign; hardware/software partitioning; heterogeneous architectures; program execution model; rapid design space visualisation; software program execution; Acceleration; Accelerometers; Bandwidth; Clocks; Computer architecture; Delay; Hardware; Software performance; Space exploration; Visualization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Programmable Logic, 2009. SPL. 5th Southern Conference on
  • Conference_Location
    Sao Carlos
  • Print_ISBN
    978-1-4244-3847-1
  • Type

    conf

  • DOI
    10.1109/SPL.2009.4914913
  • Filename
    4914913