A CMOS voltage reference using compensation of mobility and threshold voltage temperature effects

A CMOS voltage reference using compensation of mobility and threshold voltage temperature effects is proposed. In this reference, the nested connection of two NMOS transistors supplies a voltage with positive temperature coefficient, and the diode-connected NMOS transistor supplies a voltage with negative temperature coefficient. These two circuits are connected in series via an operational amplifier, and the resulting voltage that appears in the output stage of this amplifier has low temperature coefficient. The calculations are verified by simulations of the reference designed in 0.13 mum CMOS technology. The simulated reference provides a voltage of about 490 mV with the variation of 1 mV in the temperature range 20 to 120degC. The reference is able to operate with sub-1V power supplies.