• DocumentCode
    3335681
  • Title

    An approach for multilevel logic cell optimization in module generators

  • Author

    Poechmueller, P. ; Glesner, M.

  • Author_Institution
    Inst. of Microelectron. Syst., Darmstadt Univ. of Technol., Germany
  • fYear
    1991
  • fDate
    1-2 Mar 1991
  • Firstpage
    284
  • Lastpage
    289
  • Abstract
    The authors present new ideas in the field of multilevel optimization for automatic logic macrocell synthesis. The proposed new approach performs a quasi parallel optimization of very different and complex tasks via a simulated annealing based expert system. A true design space exploration is achieved, finding the best solution with respect to a certain cost-function which takes into account actual design parameters like speed, area, power, and not only indirect parameters like number of literals, etc. A small prototype software system had been implemented and it is shown how this new approach, e.g. can be used within a module generator
  • Keywords
    data structures; expert systems; integrated logic circuits; logic CAD; simulated annealing; CAD; automatic logic macrocell synthesis; cost-function; data structure; expert system; module generators; multilevel logic cell optimization; prototype software system; quasi parallel optimization; simulated annealing; Automatic logic units; Boolean functions; Circuit optimization; Circuit synthesis; Energy consumption; Expert systems; Logic circuits; Microelectronics; Minimization methods; Simulated annealing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI, 1991. Proceedings., First Great Lakes Symposium on
  • Conference_Location
    Kalamazoo, MI
  • Print_ISBN
    0-8186-2170-2
  • Type

    conf

  • DOI
    10.1109/GLSV.1991.143980
  • Filename
    143980