ATM traffic generator card. An integrated solution

Author

Hontas, St ; Tselikis, G. ; Tompros, S. ; Giamniadaki, J. ; Andritsos, S. ; Loukatos, D. ; Mitrou, N.

Author_Institution

Dept. of Electr. & Comput. Eng., Inst. of Commun. & Comput. Syst., Athens, Greece

fYear

1998

fDate

30 Jun-2 Jul 1998

Firstpage

161

Lastpage

165

Abstract

In this paper the design and the implementation of an ATM traffic generator system is presented. The basic principles of this document follow the architecture presented in Hontas et al. (1997). It is a PC-based system with a careful allocation of functions between hardware and software, in a way that it can work on-line at full-speed (155.52 Mbps) and, on the other hand, be flexible enough to emulate a wide range of ATM traffic profiles (VBR and CBR). The system is composed of a basic traffic generator and ATM signalling core card and four peripheral cards for the support of different physical interfaces. The architecture of the core card is open to any future modifications concerning signalling and functionality. The software of the system is running under Windows NT

Keywords

asynchronous transfer mode; telecommunication computing; telecommunication equipment; telecommunication signalling; telecommunication traffic; test equipment; 155.52 Mbit/s; ATM signalling core card; ATM traffic generator card; CBR; PC-based system; VBR; Windows NT software; architecture; constant bit rate; peripheral card; variable bit rate; Character generation; Computer architecture; Information analysis; Instruction sets; Postal services; Signal design; Signal generators; Telecommunication traffic; Testing; Traffic control;

fLanguage

English

Publisher

ieee

Conference_Titel

Computers and Communications, 1998. ISCC '98. Proceedings. Third IEEE Symposium on

Conference_Location

Athens

Print_ISBN

0-8186-8538-7

Type

conf

DOI

10.1109/ISCC.1998.702477

Filename

702477