Allocating SMART cache segments for schedulability

Author

Kirk, David B. ; Strosnider, Jay K. ; Sasinowski, John E.

Author_Institution

Dept. of Adv. Technol., IBM Federal Sector Div., Owego, NY, USA

fYear

1991

fDate

12-14 Jun 1991

Firstpage

41

Lastpage

50

Abstract

Since they were first introduced in the IBM 360/85 in 1969, cache designs have been optimized for average case performance, which has opened a wide gap between average case performance and the worst case performance that is critical to real-time computing community. The SMART (Strategic Memory Allocation for Real-Time) cache design narrows this gap. This paper focuses on an analytical approach to cache allocation. An overview of the SMART caching strategy is presented, as well as a dynamic programming algorithm which finds an allocation of cache segments to a set of periodic tasks that both minimizes the utilization of the task set and guaranteeing that the task set remains schedulable using rate monotonic scheduling. Results which show SMART caches narrowing the gap between average and worst case performance to less than 10% are then presented

Keywords

buffer storage; dynamic programming; performance evaluation; real-time systems; scheduling; storage allocation; SMART cache segments; SMART caching strategy; Strategic Memory Allocation for Real-Time; average case performance; cache allocation; cache partitioning; cache segments allocation; dynamic programming algorithm; minimal task set utilization; periodic tasks; rate monotonic scheduling; real time computing; schedulability; worst case performance; Cache memory; Dynamic programming; Dynamic scheduling; Hardware; Heuristic algorithms; Job shop scheduling; Kirk field collapse effect; Processor scheduling; Scheduling algorithm; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Real Time Systems, 1991. Proceedings., Euromicro '91 Workshop on

Conference_Location

Paris-Orsay

Print_ISBN

0-8186-2210-5

Type

conf

DOI

10.1109/EMWRT.1991.144078

Filename

144078