DocumentCode
3337444
Title
A NOR Emulation Strategy over NAND Flash Memory
Author
Lin, Jian-Hong ; Chang, Yuan-Hao ; Hsieh, Jen-Wei ; Kuo, Tei-Wei ; Yang, Cheng-Chih
Author_Institution
Nat. Taiwan Univ., Taipei
fYear
2007
fDate
21-24 Aug. 2007
Firstpage
95
Lastpage
102
Abstract
This work is motivated by a strong market demand in the replacement of NOR flash memory with NAND flash memory to cut down the cost in many embedded-system designs, such as mobile phones. Different from LRU-related caching or buffering studies, we are interested in prediction-based prefetching based on given execution traces of application executions. An implementation strategy is proposed in the storage of the prefetching information with limited SRAM and run-time overheads. An efficient prediction procedure is presented based on information extracted from application executions to reduce the performance gap between NAND flash memory and NOR flash memory in reads. With the behavior of a target application extracted from a set of collected traces, we show that data access to NOR flash memory can be responded effectively over the proposed implementation.
Keywords
NAND circuits; NOR circuits; cache storage; embedded systems; flash memories; storage management; NAND flash memory; NOR emulation; NOR flash memory; buffering; caching; embedded system designs; market demand; prefetching; Computer science; Costs; Embedded system; Emulation; Flash memory; Microprogramming; Mobile handsets; Prefetching; Random access memory; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded and Real-Time Computing Systems and Applications, 2007. RTCSA 2007. 13th IEEE International Conference on
Conference_Location
Daegu
ISSN
1533-2306
Print_ISBN
978-0-7695-2975-2
Type
conf
DOI
10.1109/RTCSA.2007.9
Filename
4296841
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