A Deterministic Implementation Process for Accurate and Traceable System Timing and Space Analysis

Traditionally, implementations of dependable real-time systems have targeted CPUs, with application level concurrency implemented as pseudo-concurrency on the CPU. For such systems, much research has addressed timing and resource analysis to enable offline guarantees regarding actual worst-case run-time performance. Three major weaknesses exist with the traditional implementation method. Firstly, analysis is post-hoc, after application compilation and worst-case execution time analysis. Secondly, timing analysis is pessimistic and difficult, due to the unpredictable nature of complex CPUs. Thirdly, the compilation process is largely non-traceable, in that it is difficult to relate object code back to source code (which introduces verification difficulties in safety-critical systems). This paper addresses these three problems with an implementation approach and analysis method that: enables timing and space properties to be established directly from source (not after compilation); provides a deterministic and traceable implementation to ease verification; and enables non-pessimistic timing analysis of the implementation as no CPU is utilised. As an exemplar of the approach, the compilation of a standard real-time safety-critical subset of Ada to a circuit (implemented on field programmable gate array) is presented.