Title :
Globally-asynchronous locally-synchronous architectures to simplify the design of on-chip systems
Author :
Muttersbach, Jens ; Villiger, Thomas ; Kaeslin, Hubcrt ; Felber, Norbert ; Fichtner, Wolfgang
Author_Institution :
Integrated Syst. Lab., Swiss Fed. Inst. of Technol., Zurich, Switzerland
Abstract :
A novel methodology for realizing Globally-Asynchronous Locally-Synchronous (GALS) architectures is reported. We developed a library of predesigned modules that facilitate the assembly of independently clocked modules to on-chip systems. The components of this library establish high-performance data exchange channels which are instrumental in constructing flexible architectures. The validity of our concept is proven by applying it to an ASIC design with real-world complexity
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; circuit complexity; integrated circuit design; logic design; synchronisation; 0.25 mum; 400 MHz; ASIC design; CMOS technologies; ciphering unit; flexible architectures; globally-asynchronous locally-synchronous architectures; high-performance data exchange channels; independently clocked modules; on-chip system design; predesigned module library; real-world complexity; synchronization scheme; Application specific integrated circuits; Assembly systems; CMOS technology; Clocks; Delay; Instruments; Laboratories; Libraries; Sampling methods; System-on-a-chip;
Conference_Titel :
ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-5632-2
DOI :
10.1109/ASIC.1999.806526
