A low-power video 10-bit CMOS D/A converter using modified look-ahead circuit

Author

Xu, Yang ; Min, Hao

Author_Institution

Syst. State Key Lab., ASIC, Shanghai, China

fYear

1999

fDate

1999

Firstpage

370

Lastpage

373

Abstract

This paper describes a 10 bit 50 MSample/s CMOS D/A Converter fabricated in a 1 μm single-poly double-metal CMOS process. About 30% power can be saved in a video application by using a modified look-ahead circuit. The INL is less than 0.46 LSB, and the DNL is less than 0.03 LSB in the power-save mode. The settling time to 0.1% is less than 20 ns. At 50 MS/s the SFDR is 60 dB. This D/A converter has a single power supply of 5 V, and, at 50 M/s when the input is all zero, dissipates 20 mW, and when the input is all one, dissipates 250 mW. The core chip size is 1.4 mm×2.8 mm

Keywords

CMOS integrated circuits; digital-analogue conversion; integrated circuit design; low-power electronics; video signal processing; 10 bit; 10 bit 50 MSample/s CMOS D/A converter; 20 mW; 20 ns; 250 mW; 5 V; DNL; INL; SFDR; core chip size; digital video signal processing; low-power video 10-bit CMOS D/A converter; modified look-ahead circuit; power dissipation; power-save mode; settling time; single power supply; single-poly double-metal CMOS process; Application specific integrated circuits; CMOS digital integrated circuits; CMOS integrated circuits; CMOS process; Costs; Decoding; Power supplies; Signal resolution; Switches; Video signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International

Conference_Location

Washington, DC

Print_ISBN

0-7803-5632-2

Type

conf

DOI

10.1109/ASIC.1999.806537

Filename

806537