Low power and noise tolerant 20 Gb/s CMOS TIA for short-distance optical interconnect

Author

Paillet, Fabrice ; Karnik, Tanay

Author_Institution

Circuit Res., Intel Labs., Hillsboro, OR, USA

fYear

2003

fDate

23-25 Feb. 2003

Firstpage

49

Lastpage

53

Abstract

In this paper we present the design of a low power and noise tolerant 20 Gb/s differential TransImpedance Amplifier (TIA) in 0.1 μm CMOS technology. The target application is short distance optical interconnect (<1 meter). A single ended structure is first proposed and extended to a differential structure. The simulation results show that significant improvements can be obtained by our differential derived structure in terms of power supply noise rejection compared to the conventional use of a dummy differential circuit.

Keywords

CMOS analogue integrated circuits; differential amplifiers; integrated circuit noise; low-power electronics; optical interconnections; 0.1 micron; 1 m; 20 Gbit/s; CMOS technology; differential structure; differential transimpedance amplifier; low power transimpedance amplifier; noise tolerant amplifier; power supply noise rejection; short distance optical interconnect application; single ended structure; Bandwidth; CMOS technology; Circuit noise; Copper; Energy consumption; Optical amplifiers; Optical interconnections; Optical noise; Optical receivers; Vertical cavity surface emitting lasers;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed-Signal Design, 2003. Southwest Symposium on

Print_ISBN

0-7803-7778-8

Type

conf

DOI

10.1109/SSMSD.2003.1190395

Filename

1190395