• DocumentCode
    334
  • Title

    An Energy and Performance Efficient DVFS Scheme for Irregular Parallel Divide-and-Conquer Algorithms on the Intel SCC

  • Author

    Yu-Liang Chou ; Shaoshan Liu ; Eui-Young Chung ; Gaudiot, Jeen-Luc

  • Author_Institution
    Univ. of California, Irvine, Irvine, CA, USA
  • Volume
    13
  • Issue
    1
  • fYear
    2014
  • fDate
    Jan.-June 27 2014
  • Firstpage
    13
  • Lastpage
    16
  • Abstract
    The divide-and-conquer paradigm can be used to express many computationally significant problems, but an important subset of these applications is inherently load-imbalanced. Load balancing is a challenge for irregular parallel divide-and-conquer algorithms and efficiently solving these applications will be a key requirement for future many-core systems. To address the load imbalance issue, instead of attempting to dynamically balancing the workloads, this paper proposes an energy and performance efficient Dynamic Voltage and Frequency Scaling (DVFS) scheduling scheme, which takes into account the load imbalance behavior exhibited by these applications. More specifically, we examine the core of the divide-and-conquer paradigm and determine that the base-case-reached point where recursion stops is a suitable place in a divide-and-conquer paradigm to apply the proposed DVFS scheme. To evaluate the proposed scheme, we implement four representative irregular parallel divide-and-conquer algorithms, tree traversal, quicksort, finding primes, and n-queens puzzle, on the Intel Single-chip Cloud Computer (SCC) many-core machine. We demonstrate that, on average, the proposed scheme can improve performance by 41% while reducing energy consumption by 36% compared to the baseline running the whole computation with the default frequency configuration (400MHz).
  • Keywords
    divide and conquer methods; energy conservation; microprocessor chips; multiprocessing systems; parallel algorithms; power aware computing; processor scheduling; resource allocation; Intel SCC; Intel single-chip cloud computer; base-case-reached point; dynamic voltage and frequency scaling; energy consumption reduction; energy efficient DVFS scheme; finding primes; frequency 400 MHz; irregular parallel divide-and-conquer algorithms; load imbalance behavior; many-core machine; n-queens puzzle; performance efficient DVFS scheme; quicksort; recursion stops; tree traversal; Distributed prcessing; Operating systems; Parallel processing; Performance evaluation; Software engiineering; D Software/Software Engineering; D.4 Operating Systems; D.4.7 Organization and Design; D.4.7.b Distributed systems; D.4.7.f Parallel systems; D.4.8.a Measurements < D.4.8 Performance < D.4 Operating Systems < D Software/Software Engineering; DVFS; Divide-and-conquer; Intel SCC; Load Imbalance;
  • fLanguage
    English
  • Journal_Title
    Computer Architecture Letters
  • Publisher
    ieee
  • ISSN
    1556-6056
  • Type

    jour

  • DOI
    10.1109/L-CA.2013.1
  • Filename
    6489971