A pixel readout chip designed in 90nm CMOS process for high count rate imaging systems

We report on the design of a prototype IC called PX90 dedicated for readout of hybrid pixels detectors in X-ray imaging applications. The PX90 has dimensions 4×4 mm² and was designed in CMOS 90 nm technology with 9 metals layers. The core of the IC is a matrix of 40×32 pixels with the size of 100×100 ¿m². A 60×60 ¿m² square passivation opening in each pixel allows to connect PX90 to a pixel detector using stud bump bonding techniques. Each pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two second stage amplifiers, two discriminators and two 16-bit ripple counters. The stages are DC-coupled and the front-end electronics uses fully differential readout scheme. To minimize the effective threshold spread at the discriminators inputs two 8bit and 7-bit trim DACs are used. The data are read out from a single LVDS output with clock frequency of 200 MHz. The effective pulse shaping is 27 ns and it´s determined mainly by the time constants in CSA. The measurements show an ENC of 204 el. rms without detector and 240 - 249 el. rms with stud bump bonded detector. The average gain is 28 ¿V/el. and the effective threshold variation (using trim DAC) is 1.8 mV at the discriminator input. Each pixel contains about 1800 transistors and has a static power consumption of 47 ¿W for nominal bias condition.