DocumentCode :
3341793
Title :
Optimization and Implementation of AVS-M Decoder on ARM
Author :
Lei, Baiying ; Jin, Wenguang ; Zhang, Huifang ; Hu, Kailing
Author_Institution :
Zhejiang Univ., Hangzhou
fYear :
2007
fDate :
22-24 Aug. 2007
Firstpage :
255
Lastpage :
258
Abstract :
AVS-M is the recent mobile video coding standard of China. Currently, ARM cores are widely used in mobile applications because of their low power consumption. In this paper, a scheme of the AVS-M decoder realtime implementation on 32 bit MCU RISC processor ARM920T (S3C2440) is presented. The algorithm, redundancy, structure and memory optimization methods to implement AVS-M realtime are discussed in detail. The experiment results demonstrate the success of our optimization techniques and the realtime implementation. The ADS, MCPS and simulation results show that the proposed AVS-M decoder can decode the QVGA image sequence in real-time with high image quality and has low complexity and less memory requirement. AVS conformance test result confirms the proposed AVS-M decoder full compliance with AVS. The proposed AVS-M decoder can be employed in many real-time applications in the third generation communication.
Keywords :
3G mobile communication; code standards; decoding; image sequences; video coding; ARM; AVS-M decoder; China; MCURISC processor ARM920T; QVGA image sequence; S3C2440; image quality; memory optimization methods; mobile video coding standard; third generation communication; Decoding; Discrete cosine transforms; Filters; High definition video; Macrocell networks; Reduced instruction set computing; Smart phones; Standards development; Video coding; Video compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Image and Graphics, 2007. ICIG 2007. Fourth International Conference on
Conference_Location :
Sichuan
Print_ISBN :
0-7695-2929-1
Type :
conf
DOI :
10.1109/ICIG.2007.166
Filename :
4297093
Link To Document :
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