• DocumentCode
    3342274
  • Title

    Retiming of circuits containing multiplexers

  • Author

    Simon, Sven ; Hofner, Johann ; Nossek, Josef A.

  • Author_Institution
    Inst. for Network Theory & Circuit Design, Tech. Univ. Munchen, Germany
  • Volume
    3
  • fYear
    1995
  • fDate
    30 Apr-3 May 1995
  • Firstpage
    1736
  • Abstract
    Classical retiming optimization algorithms do not consider circuits containing multiplexers or demultiplexers driven by a clock signal, because the associated retiming equations differ from the special classical form, which make applicable combinatorial algorithms of polynomial order. In order to provide an algorithm for multiplexer circuits it is shown here that retiming, being an integer linear programming problem inherently, can be relaxed to a linear programming formulation with real valued variables. This is due to the unimodularity of the matrices of the retiming formulation. Multiplexer circuits change this property in a way which suggests how to use an integer linear programming problem to derive a polynomial retiming algorithm
  • Keywords
    VLSI; circuit CAD; circuit optimisation; clocks; demultiplexing; integrated circuit design; linear programming; multiplexing; timing; CAD; VLSI; clock signal; demultiplexers; high speed circuits; linear programming formulation; multiplexers; polynomial retiming algorithm; retiming equations; retiming optimization algorithms; unimodularity; Circuit synthesis; Clocks; Delay; Equations; Frequency; Integer linear programming; Integrated circuit synthesis; Logic; Multiplexing; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    0-7803-2570-2
  • Type

    conf

  • DOI
    10.1109/ISCAS.1995.523748
  • Filename
    523748