DocumentCode
3343600
Title
A BDD based algorithm for detecting difficult faults
Author
Bolchini, C. ; Fummi, F. ; Gemelli, R. ; Salice, F.
Author_Institution
Dipartimento di Elettronica e Inf., Politecnico di Milano, Italy
Volume
3
fYear
1995
fDate
30 Apr-3 May 1995
Firstpage
2015
Abstract
The aim of this paper is the presentation of a new methodology for fast test pattern generation for difficult faults. A BDD-based algorithm is applied as back-end of a standard ATPG (e.g. SOCRATES, FAN, PODEM) thus providing a solution to their inefficiency in difficult faults analysis. Experimental results show the effectiveness of the proposed approach on a number of benchmark circuits
Keywords
Boolean functions; automatic test software; circuit analysis computing; combinational circuits; fault location; logic testing; ATPG backend; BDD based algorithm; difficult faults analysis; difficult faults detection; fast test pattern generation; Algorithm design and analysis; Artificial intelligence; Binary decision diagrams; Boolean functions; Circuit faults; Circuit testing; Data structures; Fault detection; Pattern analysis; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
0-7803-2570-2
Type
conf
DOI
10.1109/ISCAS.1995.523818
Filename
523818
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