• DocumentCode
    3343948
  • Title

    Efficient approximation of symbolic network functions using matroid intersection algorithms

  • Author

    Yu, Qicheng ; Sechen, Carl

  • Author_Institution
    Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
  • Volume
    3
  • fYear
    1995
  • fDate
    30 Apr-3 May 1995
  • Firstpage
    2088
  • Abstract
    An efficient and effective approximation strategy is the key to the symbolic analysis of large analog circuits. In this paper we propose a new approximation strategy, which directly generates common spanning trees of a two-graph in decreasing order of tree admittance product using matroid intersection algorithms. Our strategy reduces the total time for computing an approximate symbolic expression in expanded format to polynomial with respect to the circuit size and the number of sample frequencies in the range of interest, assuming the number of product terms retained in the final expression is polynomial
  • Keywords
    CMOS analogue integrated circuits; analogue integrated circuits; approximation theory; circuit analysis computing; electric admittance; operational amplifiers; polynomials; trees (mathematics); CMOS op amp; RAINIER analysis program; analog IC; common spanning trees; large analog circuits; matroid intersection algorithms; polynomial-time approximation strategy; symbolic analysis; symbolic network function approximation; tree admittance product; two-graph; undirected graphs; Admittance; Analog integrated circuits; Approximation algorithms; Art; Computer networks; Error correction; Transfer functions; Tree graphs; USA Councils; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    0-7803-2570-2
  • Type

    conf

  • DOI
    10.1109/ISCAS.1995.523836
  • Filename
    523836