DocumentCode
3344442
Title
NESP: an analog NEural Signal Processor
Author
Costa, M. ; Palmisano, D. ; Pasero, E.
Author_Institution
Dipartimento di Elettronica, Politecnico di Torino, Italy
Volume
3
fYear
1995
fDate
30 Apr-3 May 1995
Firstpage
2189
Abstract
This paper presents a signal processor based on neural computation rather than traditional programming. This processor has analog input-output, analog processing unit and analog memory. It doesn´t require any converter to be interfaced to analog signals. Configuration data is stored into an internal analog memory, based on flash EEPROM technology. A modular architecture allows one to put together more processors to configure more layers and more neurons
Keywords
EPROM; analogue processing circuits; neural chips; neural net architecture; signal processing; NESP; analog input-output; analog memory; analog neural signal processor; analog processing unit; flash EEPROM; modular architecture; Analog memory; Application software; Capacitors; Circuits; EPROM; Employment; Neural networks; Neurons; Signal processing; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
0-7803-2570-2
Type
conf
DOI
10.1109/ISCAS.1995.523861
Filename
523861
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