Title :
Fault-tolerant neural architectures: the use of rotated operands
Author :
Hsu, Yuang-Ming ; Piuri, Vincenzo ; Swartzlander, Earl E., Jr.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
fDate :
30 Apr-3 May 1995
Abstract :
The use of neural networks in mission-critical applications requires concurrent error detection and correction at architectural level to provide high consistency and reliability of system outputs. Time redundancy allows for fault tolerance in digital realizations with low circuit complexity increase when timing constraints are not particularly strict. The use of time redundancy implemented via operand rotation is discussed in this paper
Keywords :
error correction; error detection; fault tolerant computing; neural net architecture; neural nets; redundancy; architectures; concurrent error detection; consistency; digital circuits; error correction; fault tolerance; mission-critical applications; neural networks; reliability; rotated operands; time redundancy; Arithmetic; Circuit faults; Complexity theory; Computer architecture; Error correction; Fault tolerance; Integrated circuit interconnections; Mission critical systems; Neurons; Redundancy;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.523864
