Title :
Parallel processing in Boolean algebra
Author :
Svoboda, Antonin
Author_Institution :
Dept. of Comput. Sci., Univ. of California, Los Angeles, CA, USA
Abstract :
A processor called Boolean Analyzer has been presented at IFIP Congress 1968 to introduce parallel processing of Boolean expressions [1]. The present paper shows how to increase its speed many times by making its processing more parallel. The applications of the Boolean Analyzer are limited to few but important problems. A typical problem of that kind: listing of all implicants of a function of 7 variables defined by not more than 100 term implicants (of the complement of that function) takes about 40 microsecond only (supposing a delay line storage working at the clock impulserate of 2.106 per sec).
Keywords :
Boolean algebra; parallel processing; Boolean algebra; Boolean analyzer; Boolean expressions; IFIP Congress; parallel processing; Clocks; Radiation detectors; Wires;
Conference_Titel :
Computer Arithmetic (ARITH), 1972 IEEE 2nd Symposium on
Conference_Location :
New York, NY
DOI :
10.1109/ARITH.1972.6153894