• DocumentCode
    3345128
  • Title

    Methodology and Experimental Setup for the Determination of System-level Dynamic Reconfiguration Overhead

  • Author

    Papadimitriou, Kyprianos ; Anyfantis, Antonis ; Dollas, Apostolos

  • Author_Institution
    Tech. Univ. of Crete, Crete
  • fYear
    2007
  • fDate
    23-25 April 2007
  • Firstpage
    335
  • Lastpage
    336
  • Abstract
    Dynamic reconfiguration is gaining popularity [2], [4] but it may cause degradation of overall execution time due to the time to download the bitstream before an application starts execution of the new configuration. Thus evaluation of its performance becomes an interesting area [3]. In this work we include an analysis of the reconfiguration time by defining the delays that add up to it. An experimental setup is deployed that can be used for performance evaluation of applications implemented with dynamic reconfiguration, as well as of mechanisms developed to reduce reconfiguration overhead.
  • Keywords
    reconfigurable architectures; bitstreams; performance evaluation; reconfiguration time analysis; system-level dynamic reconfiguration overhead; Added delay; Application software; Degradation; Delay effects; Delay systems; Field programmable gate arrays; Fires; Flash memory; Reconfigurable logic; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines, 2007. FCCM 2007. 15th Annual IEEE Symposium on
  • Conference_Location
    Napa, CA
  • Print_ISBN
    978-0-7695-2940-0
  • Type

    conf

  • DOI
    10.1109/FCCM.2007.45
  • Filename
    4297287