DocumentCode
3345657
Title
An Open Framework for Detailed Hardware Modeling
Author
Taha, Safouan ; Radermacher, A. ; Gerard, Sebastien ; Dekeyser, Jean-Luc
Author_Institution
CEA, Gif-sur-Yvette
fYear
2007
fDate
4-6 July 2007
Firstpage
118
Lastpage
125
Abstract
When interfacing hardware and software design flows, it is a common practice to specify abstracted and understandable models in order to communicate design intends and to study interdependencies affecting design decisions. Modeling languages, such as UML, help to create architectural specifications amenable for reuse, complexity managing, and system refinements. This paper presents a set of extensions to UML that ensure description and conception of hardware through different views and detail levels. At the same time, the proposed extensions offer annotations to analyze and simulate the main extra-functional characteristics of embedded systems, namely, performance, power consumption and memory usage. This work is part of the upcoming OMG´s standard for modeling and analysis of real-time and embedded systems (MARTE).
Keywords
Unified Modeling Language; embedded systems; hardware-software codesign; UML languages; architectural specifications; design decisions; detailed hardware modeling; embedded systems; hardware design flows; modeling languages; real-time systems; software design flows; system refinements; Analytical models; Embedded system; Energy consumption; Hardware; Performance analysis; Power system management; Power system modeling; Real time systems; Software design; Unified modeling language;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Embedded Systems, 2007. SIES '07. International Symposium on
Conference_Location
Lisbon
Print_ISBN
1-4244-0840-7
Electronic_ISBN
1-4244-0840-7
Type
conf
DOI
10.1109/SIES.2007.4297325
Filename
4297325
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