• DocumentCode
    3345743
  • Title

    Ag plating and its impact on void-free Ag/Sn bumping

  • Author

    Ezawa, Hirokazu ; Higuchi, Kazuhito ; Seto, Msaharu ; Togasaki, Takashi ; Takeda, Sachiko ; Kiumi, Rei

  • Author_Institution
    Toshiba Corp. Semicond. Co., Yokohama, Japan
  • fYear
    2005
  • fDate
    31 May-3 June 2005
  • Firstpage
    107
  • Abstract
    We have already developed the eutectic Sn-Ag solder bumping process by alloying Ag/Sn electroplated metal stacks to overcome some problems concerning Sn-Ag alloy plating. As the dimensions of solder bumps shrink, the effect of voids in the solder bumps on electromigration resistance must be discussed. For the Sn-Ag alloy plated bumps, voids in the solder bumps as reflow processed are difficult to be avoided. The large amount of degassed species from the alloy-plated bumps due to strong chemical agents trapped in the plated films has a close relation to generation of voids in the bumps. In contrast, though the stack plating process shows less degassing, micro-voids would be left at the interface of the plated stack as embryos of residual voids in the solder bumps. In this study, surface roughness of the underlying Ag films and degassing behavior of the Ag/Sn stack-plated bumps has been investigated using different types of Ag plating solutions. Gas analyses and X-ray imaging inspections were performed for the Ag/Sn plated stacks. Surface roughness of the underlying Ag layer was also characterized by a laser scanning and scanning electron microscopy. From the experimental results, it has been confirmed that less degassing is the most important issue for the Ag/Sn plated stacks. In addition, improvement of surface roughness of the underlying Ag plated films must not be neglected.
  • Keywords
    electromigration; electroplating; integrated circuit interconnections; integrated circuit reliability; metallic thin films; reflow soldering; scanning electron microscopy; silver alloys; solders; surface roughness; tin alloys; SnAg; alloy plating; alloy-plated bumps; degassing behavior; electromigration resistance; electroplating; eutectic solder bumping process; integrated circuit metallisation; integrated circuit reliability; metallic thin films; reflow process; reflow soldering; scanning electron microscopy; silver films; silver plating; stack plating process; surface roughness; void-free bumping; Alloying; Chemicals; Electromigration; Embryo; Image analysis; Performance analysis; Rough surfaces; Surface roughness; Tin; X-ray imaging;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2005. Proceedings. 55th
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-8907-7
  • Type

    conf

  • DOI
    10.1109/ECTC.2005.1441254
  • Filename
    1441254