Area efficient parallel decoder architecture for long BCH codes

Author

Chen, Yanni ; Parhi, Keshab K.

Author_Institution

Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA

Volume

5

fYear

2004

fDate

17-21 May 2004

Abstract

Long BCH codes achieve additional coding gain of around 0.6 dB compared to Reed-Solomon codes with similar code rate used for long-haul optical communication systems. For our considered parallel decoder architecture, a novel group matching scheme is proposed to reduce the overall hardware complexity of both Chien search and syndrome generator units by 46% for BCH(2047, 1926, 23) code as opposed to only 22% if directly applying the iterative matching algorithm. The proposed scheme exploits the substructure sharing within a finite field multiplier (FFM) and among groups of FFMs.

Keywords

BCH codes; Galois fields; decoding; error correction codes; forward error correction; 0.6 dB; BCH(2047, 1926, 23) code; FFM groups substructure; Reed-Solomon codes; area efficient parallel decoder; coding gain; finite field multiplier substructure sharing; forward-error correction codes; group matching scheme; hardware complexity reduction; iterative matching algorithm; long BCH codes; long-haul optical communication systems; parallel Chien search architecture; syndrome generator unit; AWGN channels; Bit error rate; Computer architecture; Error correction codes; Hardware; Iterative algorithms; Iterative decoding; Optical fiber communication; Reed-Solomon codes; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04). IEEE International Conference on

ISSN

1520-6149

Print_ISBN

0-7803-8484-9

Type

conf

DOI

10.1109/ICASSP.2004.1327050

Filename

1327050