DocumentCode
3346182
Title
A highly reliable flip chip solution based on electroplated AuSn bumps in a leadless package
Author
Theuss, H. ; Pressel, K. ; Paulus, S. ; Kilger, T. ; Dangelmaier, J. ; Lehner, R. ; Eisener, B. ; Kiendl, H. ; Schischka, J. ; Graff, A. ; Petzold, M.
Author_Institution
Infineon Technol. AG, Regensburg, Germany
fYear
2005
fDate
31 May-3 June 2005
Firstpage
272
Abstract
We introduce an innovative flip chip in package concept based on small electroplated AuSn bumps as first level interconnect. Reliability studies prove the compliance of the leadless package concept to high quality standards, which include moisture sensitivity level 1 (MSL1), temperature cycling on board, shock tests as well as autoclave tests. Detailed SEM and TEM investigations demonstrate an excellent quality of the different interfaces. The package concept meets current packaging requirements, such as small form factor, environmental friendliness (green package), RF capability and low cost production. The flip chip in package concept, demonstrated here for small pin counts, has further potential to be extended to a medium pin count range.
Keywords
assembling; electroplating; flip-chip devices; gold alloys; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; printed circuits; scanning electron microscopy; soldering; tin alloys; transmission electron microscopy; AuSn; MSL1; SEM; TEM; autoclave test; electroplated AuSn bumps; first level interconnect; flip chip; leadless package; medium pin count; moisture sensitivity level 1; shock test; small pin count; temperature cycling; Assembly; Costs; Flip chip; Lead; Materials reliability; Plastic packaging; Radio frequency; Soldering; Testing; Thermal management;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2005. Proceedings. 55th
ISSN
0569-5503
Print_ISBN
0-7803-8907-7
Type
conf
DOI
10.1109/ECTC.2005.1441278
Filename
1441278
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