A generalized analog architecture for DCT, DST and its inverse

Author

Mal, Ashis Kumar ; Basu, Arindam

Author_Institution

Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol., Kharagpur, India

Volume

5

fYear

2004

fDate

17-21 May 2004

Abstract

This paper describes a sampled analog architecture, for computing DCT or DST, using the switched capacitor principle with capacitance switching. The input sample stream is applied to an array of capacitors and multiplied by all the DCT/DST coefficients concurrently using capacitor ratios. These capacitors are switched concurrently with the help of a switching matrix, to realize switched capacitor integrators for performing the necessary addition/subtraction. The architecture may also be used for computing inverse DCT and DST transforms. The proposed architecture is simple, regular and can be used for on-line computations, with good accuracy.

Keywords

discrete cosine transforms; integrating circuits; signal sampling; switched capacitor networks; addition; capacitor array; capacitor ratios; discrete cosine transforms; discrete sine transform; inverse DCT; inverse DST; on-line computation; sampled analog architecture; subtraction; switched capacitor integrators; switching matrix; Analog computers; Capacitance; Capacitors; Computer architecture; Discrete cosine transforms; Discrete transforms; Kernel; Speech processing; Switches; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04). IEEE International Conference on

ISSN

1520-6149

Print_ISBN

0-7803-8484-9

Type

conf

DOI

10.1109/ICASSP.2004.1327097

Filename

1327097