DocumentCode
334710
Title
CORDIC algorithm with digits skipping
Author
Hormigo, J. ; Villalba, J. ; Zapata, E.L.
Author_Institution
Dept. Comput. Architecture, Malaga Univ., Spain
Volume
1
fYear
1998
fDate
1-4 Nov. 1998
Firstpage
194
Abstract
We present a modification of the CORDIC algorithm which permits one to reduce the average number of iterations by up to 31% with a very low hardware cost. It is based on skipping consecutive zeros and Booth recoding consecutive ones in the z coordinate after iteration n/2. In this way we only perform microrotations for bits equal to one in z(n/2). Skipping zeros and Booth recoding ones are carried out on-the-fly, needing no additional cycles.
Keywords
digital arithmetic; digital signal processing chips; iterative methods; Booth recoding consecutive ones; CORDIC algorithm; consecutive zeros; digits skipping; iterations; microrotations; very low hardware cost; Approximation algorithms; Computer architecture; Concurrent computing; Costs; Digital signal processing; Equations; Hardware;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems & Computers, 1998. Conference Record of the Thirty-Second Asilomar Conference on
Conference_Location
Pacific Grove, CA, USA
ISSN
1058-6393
Print_ISBN
0-7803-5148-7
Type
conf
DOI
10.1109/ACSSC.1998.750852
Filename
750852
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