A Tezzaron-Chartered 3D-IC electronic for SLHC/ATLAS hybrid pixels detectors test results and irradiations performance

The ATLAS pixel collaboration has started in 2008 a R&D program to use the latest advances in 3-D electronics technology in order to develop a new Front-End (FE) chip for a vertex detector for High Energy Physics (HEP). This program using the commercial Tezzaron-Chartered 0.13μm LP technology should be able to fulfill the requirements imposed by the ten times higher luminosity given by the High Luminosity LHC accelerator. The FE-TC4-P1 is a hybrid pixel read-out chip realized by the first MPW for HEP. This three dimensional chip includes an analog part called FE-TC4-AE and two digital parts called FE-TC4-DS and FE-TC4-DC. At the same time, several prototypes were realized in Chartered 0.13μm LP technology, in order to disentangle from effects induced by 3D architecture. These FE-C4-P1,2,3 prototypes have proved a good radiation hardness up to 400Mrads as well as good performances. This paper presents results from the FE-TC4-P1 chip which has been recently tested and irradiated.