Title :
Investigation of phase change of flip chip solders during the second level interconnect reflow
Author :
Chung, Soonwan ; Tang, Zhenming ; Park, Seungbae
Author_Institution :
Dept. of Mech. Eng., SUNY, Binghamton, NY, USA
fDate :
31 May-3 June 2005
Abstract :
The effects of phase change (from solid to liquid) of flip chip Pb-free solders during 2nd level interconnect reflow are investigated. Most of the current Pb-free solder candidates are Sn based solders and their melting temperatures are similar in the range of 30 degree C. Thus, flip chip Pb-free solders are melted again during subsequent 2nd level interconnect (BGA) reflow cycle. Like most of other metals, a solder expands its volume during the phase change as much as 4%. The volumetric expansion of solder in a confined space formed of chip, substrate, and underfill creates serious reliability issues. The issues include underfill fracture and delamination of the underfill from chip or substrate. This leads to the shorting of the neighboring flip chip interconnects by the interjected solder through the underfill crack or delaminated interfaces. Accordingly, Pb-free flip chip packages should have an additional reliability issue that is not a concern for Pb solder packages. In this paper, a typical flip chip package is modeled to quantify the impact of the volumetric expansion of Pb-free solder. Two possible cases are investigated. They are with and without existence of a micro crack between chip and underfill which lead to underfill crack and delamination, respectively. Parametric studies are carried out by changing material properties of underfill and interconnect pitch. Also, the impact of geometry of solder interconnect is explored. The volumetric expansions of Pb-free solders are experimentally quantified, and applied to the analyses.
Keywords :
flip-chip devices; integrated circuit interconnections; lead; reflow soldering; reliability; solders; tin; 2nd level interconnect reflow; BGA reflow cycle; Pb; Pb solder packages; Sn; delaminated interfaces; delamination; flip chip Pb-free solders; flip chip interconnects; flip chip packages; flip chip solders; melting temperatures; phase change; second level interconnect reflow; underfill crack; underfill fracture; volumetric solder expansion; Delamination; Flip chip; Geometry; Lead; Material properties; Packaging; Parametric study; Solids; Temperature distribution; Tin;
Conference_Titel :
Electronic Components and Technology Conference, 2005. Proceedings. 55th
Print_ISBN :
0-7803-8907-7
DOI :
10.1109/ECTC.2005.1441378