• DocumentCode
    3348104
  • Title

    A simple assertional proof system for real-time systems

  • Author

    Shankar, A. Udaya

  • Author_Institution
    Dept. of Comput. Sci., Maryland Univ., College Park, MD, USA
  • fYear
    1992
  • fDate
    2-4 Dec 1992
  • Firstpage
    167
  • Lastpage
    176
  • Abstract
    A simple proof system for a real-time system model similar to that of timed I/O automata is presented. By introducing state variables indicating the last event occurrence time and event deadline time, one can express real-time properties in terms of traditional safety and progress assertions (e.g. invariant, unless, and leads-to) which are interpreted in the standard way. As a result, one can prove them using traditional proof rules (with weak fairness assumptions being replaced by finite upper bound timing assumptions). Unlike other approaches, one does not use a current time variable. The proof system is illustrated on a real-time mutual exclusion algorithm. The authors have also applied it to examples from the timed I/O automata literature
  • Keywords
    automata theory; real-time systems; theorem proving; event deadline time; finite upper bound timing assumptions; last event occurrence time; progress assertions; real-time mutual exclusion algorithm; real-time properties; real-time system model; safety; simple assertional proof system; state variables; timed I/O automata; traditional proof rules; weak fairness assumptions; Automata; Computer science; Contracts; Educational institutions; Logic; Real time systems; Safety; Timing; Upper bound;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Real-Time Systems Symposium, 1992
  • Conference_Location
    Phoenix, AZ
  • Print_ISBN
    0-8186-3195-3
  • Type

    conf

  • DOI
    10.1109/REAL.1992.242666
  • Filename
    242666