DocumentCode
3348239
Title
Optimization of the On-Chip Optical Receivers
Author
Owczarek, Mariusz ; Tosik, Grzegorz ; Lisik, Zbigniew ; O´Connor, Ian
Author_Institution
Inst. of Electron., Tech. Univ. of Lodz, Lodz
fYear
2007
fDate
19-24 Feb. 2007
Firstpage
130
Lastpage
132
Abstract
In this paper we present a general idea of on-chip optical interconnects, example simulations of the transimpedance amplifier circuits in CMOS and HBT technology and the optimization problems.
Keywords
CMOS integrated circuits; Pareto optimisation; amplifiers; bipolar integrated circuits; bipolar transistor circuits; heterojunction bipolar transistors; integrated circuit interconnections; integrated optoelectronics; optical interconnections; optical receivers; CMOS technology; HBT technology; Pareto Front method; on-chip optical receiver; optical interconnects; optimization; transimpedance amplifier circuits; Bandwidth; CMOS technology; Circuit simulation; Circuit topology; Heterojunction bipolar transistors; Integrated circuit technology; Optical amplifiers; Optical interconnections; Optical receivers; Semiconductor optical amplifiers; Pareto Front method; optical interconnects; transimpedance amplifier;
fLanguage
English
Publisher
ieee
Conference_Titel
CAD Systems in Microelectronics, 2007. CADSM '07. 9th International Conference - The Experience of Designing and Applications of
Conference_Location
Lviv-Polyana
Print_ISBN
966-533-587-0
Type
conf
DOI
10.1109/CADSM.2007.4297501
Filename
4297501
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