Cache coherent shared memory hypercube multiprocessors

Author

Ding, Jianxun ; Bhuyan, Laxmi N.

Author_Institution

Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA

fYear

1992

fDate

1-4 Dec 1992

Firstpage

515

Lastpage

520

Abstract

The authors examine the feasibility of building cache coherent shared memory multiprocessor systems on hypercube. Various shared memory schemes are investigated and compared with each other. The schemes considered are based on memory coherence algorithms for distributed shared memory and cache coherence protocols for other shared memory architectures. It is concluded that efficient cache coherent architectures can be built using hypercubes

Keywords

hypercube networks; multiprocessing systems; protocols; cache coherence protocols; cache coherent shared memory multiprocessor systems; distributed shared memory; hypercube; memory coherence algorithms; Computer architecture; Computer science; Delay; Hypercubes; Memory architecture; Memory management; Message passing; Multiprocessing systems; Multiprocessor interconnection networks; Protocols;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel and Distributed Processing, 1992. Proceedings of the Fourth IEEE Symposium on

Conference_Location

Arlington, TX

Print_ISBN

0-8186-3200-3

Type

conf

DOI

10.1109/SPDP.1992.242701

Filename

242701

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3348380