Z-Axis Interconnection for Enhanced Wiring in Organic Laminate Electronic Packages

Greater I/O density at the die level, coupled with more demanding performance requirements, is driving the need for improved wiring density and a concomitant reduction in feature sizes for electronic packages. Traditionally, greater wiring densities are achieved by reducing the dimensions of vias, lines, and spaces, increasing the number of wiring layers, and utilizing blind and buried vias. However, each of these approaches possesses inherent limitations, for example those related to drilling and plating of high aspect ratio vias, reduced conductance of narrow circuit lines, and increased cost of fabrication related to additional wiring layers. One method of extending wiring density beyond the limits imposed by these approaches is a strategy that allows for metal-to-metal z-axis interconnection of subcomposites during lamination to form a composite structure. Conductive joints can be formed during lamination using an electrically conductive paste. As a result, one is able to fabricate structures with vertically-terminated vias of arbitrary depth. Replacement of conventional plated through holes with vertically-terminated vias opens up additional wiring channels on layers above and below the terminated vias, enables die shrink, and eliminates via stubs which cause reflective signal loss. In addition, parallel lamination of testable subcomposites offers yield improvement, shorter cycle times, and ease of incorporating features conducive to high speed data rates. As a case study, an example of a z-axis interconnect construction for a flip-chip plastic ball grid array package with a 150 m die pad pitch is given. The processes and materials used to achieve smaller feature dimensions, satisfy stringent registration requirements, and achieve robust electrical interconnections are discussed