DocumentCode :
3348772
Title :
Fundamentals of delamination initiation and growth in flip chip assemblies
Author :
Rahim, M. Kaysar ; Suhling, Jeffrey C. ; Jaeger, Richard C. ; Lall, Pradeep
Author_Institution :
Dept. of Mech. Eng., Auburn Univ., AL, USA
fYear :
2005
fDate :
31 May-3 June 2005
Firstpage :
1172
Abstract :
Underfill encapsulation is used with flip chip die assembled to laminate substrates to distribute and minimize the solder joint strains, thus improving thermal cycling fatigue life. Any delaminations that occur at the underfill/die interface will propagate to the neighboring solder bumps and lead to solder joint fatigue and failure. The onset and propagation of delaminations in flip chip assemblies exposed to thermal cycling are governed by the cyclic stresses and damage occurring at the underfill to die interface. For this reason, underfills are optimized by increasing their adhesion strength, interfacial fracture toughness, and resistance to thermal aging. In this work, we have sought to develop a fundamental understanding of delamination initiation and growth in flip chip assemblies through simultaneous characterization of the stress and delamination states at the die to underfill interface. Mechanical stresses on the device side of the flip chip die have been measured using special (111) silicon stress test chips containing piezoresistive sensor rosettes that are capable of measuring the complete 3D silicon surface stress state in the silicon (including the interfacial shear and normal stresses at the die to underfill interface). By continuous monitoring of the sensor resistances, the die surface stresses were measured during post-assembly thermal cycling environmental testing from -40 to 125 C. With this approach, the stress distributions across the chip, and the stress variations at particular locations at the die to underfill interface have been interrogated for the entire life of the flip chip assembly. In order to correlate the stress changes at the sensor sites with delamination onset and propagation, CSAM evaluation of the test assemblies was performed after every 125 thermal cycles. A total of 75 flip chip assemblies with 3 different underfills have been evaluated. For each assembly, the complete histories of 3D die surface stresses and delamination propagation have been recorded versus the number of thermal cycles. With this approach, we have been able to identify the stress histories that lead to delamination initiation for each underfill encapsulant, and the variation of the stresses that occur before and during delamination propagation. The pr- ogressions of stress and delamination have been mapped across the entire surface of the die, and a series of stress/delamination videos have been produced. One of the most important discoveries is that the shear stresses occurring at the corners of flip chip die have been demonstrated to be a suitable proxy for prognostic determination of future delamination initiations and growth.
Keywords :
delamination; encapsulation; environmental testing; flip-chip devices; internal stresses; materials testing; microassembling; stress analysis; -40 to 125 C; 3D die surface stress; 3D silicon surface stress state; CSAM evaluation; delamination growth; delamination initiation; delamination propagation; delamination state characterization; flip chip assemblies; interfacial shear stresses; mechanical stresses; normal stresses; post-assembly environmental testing; special silicon stress test chips; stress characterization; stress distributions; stress variations; thermal cycling; underfill encapsulation; underfill interface; Assembly; Delamination; Electrical resistance measurement; Flip chip; Semiconductor device measurement; Silicon; Soldering; Stress measurement; Thermal resistance; Thermal stresses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2005. Proceedings. 55th
ISSN :
0569-5503
Print_ISBN :
0-7803-8907-7
Type :
conf
DOI :
10.1109/ECTC.2005.1441420
Filename :
1441420
Link To Document :
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