A Mapping Strategy for Coarse-grained Reconfigurable Architecture

To better utilize the potential of coarse grained reconfigurable computing architecture, the paper proposes a strategy named ¡®stretch and shrink´ for mapping the computational kernel onto the coarse grained reconfigurable processing unit array. The strategy regards the memory access requirement as the major constraint, and has adequately considered the limited function units and wiring resources. Employing the presented strategy, higher area utilization ratio and memory bus bandwidth utilization ratio have been achieved in several typical DSP kernels.