• DocumentCode
    3349982
  • Title

    Automation versus education [chip design process]

  • Author

    Aleman, Esther M. ; Soundararajan, Karthik

  • Author_Institution
    Intel Corp., Chandler, AZ, USA
  • fYear
    1991
  • fDate
    23-27 Sep 1991
  • Lastpage
    38139
  • Abstract
    The authors discuss automation of the chip design process and how this benefits the training developer. Two design automation tools are discussed, the Design Entry Tool (DET) for automation of core-based configurations, and the RAM/ROM configuration tool for user-defined memories. The RAM/ROM configuration tool allows the designer to immediately begin schematic capture and stimulate while the cell specifications are communicated to the factory. DET time studies for learning and executing schematic capture for mandatory connections using both automation and traditional education are detailed. Time studies are also included for memory mapping of a special function register and for test pattern generation. Prerequisite skills are clearly identified for the studies. Automation of the training process itself is discussed as an option to traditional dedicated instruction. This discussion includes some of the automation options available to the training developer: video, computer-based, and Digital Video Interactive (DVI) training. Former dedicated instructors can become consultants and can cater to the needs of a larger study group using automation tools
  • Keywords
    circuit CAD; computer science education; educational computing; educational courses; logic CAD; random-access storage; read-only storage; Design Entry Tool; RAM/ROM configuration tool; cell specifications; chip design process; core-based configurations; design automation tools; digital IC; education; function register; memory mapping; schematic capture; test pattern generation; training process; user-defined memories; Chip scale packaging; Design automation; Manufacturing automation; Page description languages; Production facilities; Random access memory; Read only memory; Read-write memory; Registers; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
  • Conference_Location
    Rochester, NY
  • Print_ISBN
    0-7803-0101-3
  • Type

    conf

  • DOI
    10.1109/ASIC.1991.242873
  • Filename
    242873