Title :
Development and optimization of substrate failure analysis techniques for chip scale packages
Author :
Yew, Lam Boon ; Francis, Caroline ; Mohamed, Shamsul ; Mun, Tang Wye ; Ki, Lim Too
Author_Institution :
Adv. Micro Devices, Penang, Malaysia
Abstract :
This paper details failure analysis techniques developed to analyze failures of two types of substrate widely used in chip scale packages (CSPs): (a) tape CSP substrate with polyimide (PI) tape, and (b) laminate CSP substrate with bismaleimide-triazine (BT) resin. The structure of both tape and laminate CSP substrates are discussed in detail to aid in understanding the failure analysis techniques of both these materials
Keywords :
chip scale packaging; failure analysis; integrated circuit interconnections; integrated circuit testing; laminates; optimisation; plastic packaging; BT resin; CSPs; bismaleimide-triazine resin; chip scale packages; failure analysis techniques; laminate CSP substrate; laminate CSP substrates; optimization; polyimide tape; substrate failure analysis techniques; tape CSP substrate; tape CSP substrates; Chip scale packaging; Copper; Etching; Failure analysis; Fatigue; Laminates; Lead; Resins; Substrates; Thermal stresses;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2001. IPFA 2001. Proceedings of the 2001 8th International Symposium on the
Print_ISBN :
0-7803-6675-1
DOI :
10.1109/IPFA.2001.941458
