Title :
High level synthesis of data driven ASICs
Author :
Patel, Baiju ; Pradhan, Dhiraj K. ; Koren, Israel
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
A novel approach to high level synthesis of ASICs based on a data driven execution model is presented. The synthesis procedure is directed at producing highly parallel ASICs providing high throughput through pipelining. The major benefits of the authors´ approach are its potential for higher speed, ease of design, ease of verification and testing
Keywords :
VLSI; application specific integrated circuits; logic CAD; parallel architectures; pipeline processing; benefits; data driven ASICs; data driven execution model; ease of design; ease of verification; high level synthesis; high throughput; highly parallel ASICs; pipelining; Amplitude shift keying; Application specific integrated circuits; Buffer storage; Circuit synthesis; Circuit testing; High level synthesis; Parallel processing; Pipeline processing; Throughput; Very large scale integration;
Conference_Titel :
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0101-3
DOI :
10.1109/ASIC.1991.242901
