DocumentCode :
3350471
Title :
Cameron: high level language compilation for reconfigurable systems
Author :
Hammes, Jeff ; Rinker, Bob ; Böhm, Wim ; Najjar, Walid ; Draper, Bruce ; Beveridge, Ross
Author_Institution :
Dept. of Comput. Sci., Colorado State Univ., Fort Collins, CO, USA
fYear :
1999
fDate :
1999
Firstpage :
236
Lastpage :
244
Abstract :
This paper presents the Cameron Project, which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications on reconfigurable computing systems (RCSs). SA-C, a single assignment variant of the C programming language, is designed to exploit both coarse-grain and fine-grain parallelism in image processing applications. Khoros, a software development environment commonly used for image processing, has been modified to support SA-C program development. SA-C supports image processing with true multidimensional arrays, and with sophisticated array access and windowing mechanisms. Reduction operators such as medians and histograms are also provided. The optimizing compiler targets RCSs, which are fine-grained parallel processors made up of field programmable gate arrays (FPGAs), memories and interconnection hardware. They can be used as inexpensive co-processors with conventional workstations or PCs. This paper discusses compiler optimizations to generate optimal FPGA code using dataflow analysis techniques applied to data dependence graphs. Initial results are presented
Keywords :
C language; algorithmic languages; data flow analysis; field programmable gate arrays; image processing; optimising compilers; reconfigurable architectures; software engineering; Cameron Project; Khoros software development environment; SA-C; array access; co-processors; coarse-grain parallelism; compiler optimizations; data dependence graphs; data flow analysis; field programmable gate arrays; fine-grain parallelism; fine-grained parallel processors; high level algorithmic language; high level language compilation; histograms; image processing application development; interconnection hardware; medians; memories; multidimensional arrays; optimal FPGA code generation; optimizing compiler; reconfigurable systems; reduction operators; single assignment C programming language variant; windowing mechanisms; Application software; Computer applications; Computer languages; Field programmable gate arrays; High level languages; Image processing; Multidimensional systems; Optimizing compilers; Parallel processing; Programming;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Architectures and Compilation Techniques, 1999. Proceedings. 1999 International Conference on
Conference_Location :
Newport Beach, CA
ISSN :
1089-795X
Print_ISBN :
0-7695-0425-6
Type :
conf
DOI :
10.1109/PACT.1999.807557
Filename :
807557
Link To Document :
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