DocumentCode
3350560
Title
AFMG: automatic functional model generation system for digital simulation
Author
Han, Chang Ho ; Kang, Sungho ; Szygenda, Stephen A.
Author_Institution
Valid Logic Systems, San Jose, CA, USA
fYear
1991
fDate
23-27 Sep 1991
Lastpage
38018
Abstract
This paper presents an automatic program synthesis system which generates models for digital simulators. Behavioral and structural models are generated from Boolean equations, truth tables, HDL descriptions or schematic diagrams. This system provides an efficient method for automatic model development. As a result, the design cycles can be significantly reduced
Keywords
Boolean algebra; digital simulation; logic CAD; specification languages; AFMG; Boolean equations; HDL descriptions; automatic functional model generation system; automatic program synthesis system; behavioral models; design cycles; digital simulators; schematic diagrams; structural models; truth tables; Circuit simulation; Digital simulation; Digital systems; Equations; Hardware design languages; Logic design; Logic devices; Power generation; Power system modeling; Process design;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location
Rochester, NY
Print_ISBN
0-7803-0101-3
Type
conf
DOI
10.1109/ASIC.1991.242909
Filename
242909
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