A CAVLC Decoding Architecture Based on FSM for Real-Time HD Application

Author

Wang, Dayong ; Zhou, Yujie ; Zhao, Dandan ; Mao, Jufa

Author_Institution

Dept. of Electron. Eng., Shanghai Jiao Tong Univ., Shanghai, China

Volume

2

fYear

2009

fDate

28-30 Oct. 2009

Firstpage

342

Lastpage

345

Abstract

In this paper, a real-time CAVLC decoder for HD video is designed. The whole decoding process is controlled under a finite state machine with ten states. Due to variable length code, the five syntax elements will be parsed step by step. In the proposed scheme, we exploit a look-up table algorithm based on pos (the number of zero) and may be divided into sub-table according to priority in the same pos. The synthesis results show that the architecture can satisfy the requirement for a 1920 Ã— 1080 p @ 30 fps high definition decoding.

Keywords

adaptive decoding; finite state machines; high definition video; table lookup; variable length codes; video coding; CAVLC decoding; FSM; HD video; context adaptive variable length coding; finite state machine; high definition decoding; look-up table algorithm; variable length code; Automatic voltage control; Context modeling; Decoding; Design engineering; Hardware; High definition video; Multimedia systems; Streaming media; Table lookup; Video compression; CAVLC decoding; FSM; H.264/AVC;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Science and Engineering, 2009. WCSE '09. Second International Workshop on

Conference_Location

Qingdao

Print_ISBN

978-0-7695-3881-5

Type

conf

DOI

10.1109/WCSE.2009.826

Filename

5403185