• DocumentCode
    3350861
  • Title

    Partial silicon compilation of recursive digital filters using VHDL

  • Author

    Junior, N.S.

  • Author_Institution
    CPqD-Telebras, Campinas, Sao Paolo
  • fYear
    1991
  • fDate
    23-27 Sep 1991
  • Lastpage
    38047
  • Abstract
    The FOREST computer program for the functional and architectural synthesis of recursive digital filters is described. It outputs a bit-serial architecture in the form of a VHDL netlist that may be used as input of any available logic synthesis and layout tool that accepts VHDL
  • Keywords
    circuit layout CAD; digital filters; specification languages; FOREST computer program; VHDL; VHDL netlist; architectural synthesis; bit-serial architecture; functional synthesis; layout tool; logic synthesis; partial silicon compilation; recursive digital filters; Application specific integrated circuits; Design automation; Digital filters; Digital signal processing; Frequency response; Hardware design languages; Logic; Natural languages; Signal synthesis; Silicon compiler;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
  • Conference_Location
    Rochester, NY
  • Print_ISBN
    0-7803-0101-3
  • Type

    conf

  • DOI
    10.1109/ASIC.1991.242931
  • Filename
    242931