Title :
A 20 MHz low power CMOS ASIC for a 1553 bus interface unit
Author :
Dawalt, Shane ; Ossa, Luis E. ; Siferd, Raymond ; Yeazel, Steve
Author_Institution :
Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
Abstract :
Digital Technology Inc. has developed and is successfully marketing a 1553 Bus Interface Monitor Unit. However, a reduction in power consumption and area had to be pursued in order to make the system more efficient. This project deals with the design, simulation and testing results of an ASIC that will be part of a newly redesigned unit with a significant reduction in power and component count. To achieve this, CMOS and pseudo-NMOS technologies were used to replace the original TTL and PAL chips, respectively. The prototype chip was fabricated by MOSIS using a 2 μm CMOS N-well process and packaged in a 108-pin PGA having an area of 7.9×9.2 mm2 and a power consumption of much less than 1 watt
Keywords :
CMOS integrated circuits; VLSI; application specific integrated circuits; digital integrated circuits; packaging; system buses; 1 W; 1553 bus interface unit; 2 micron; 20 MHz; 7.9 mm; 9.2 mm; ASIC; Bus Interface Monitor Unit; CMOS; Digital Technology; MOSIS; PGA; area; component count; pin-grid arrays; power consumption; prototype chip; pseudo-NMOS technologies; testing results; Application specific integrated circuits; CMOS technology; Counting circuits; Electronics packaging; Energy consumption; Libraries; Logic; Monitoring; System testing; Transmitters;
Conference_Titel :
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0101-3
DOI :
10.1109/ASIC.1991.242945
