DocumentCode
3351151
Title
Understanding PLD parameter specifications
Author
Casey, John ; Scheer, David
Author_Institution
Intel Corp., Folsom, CA, USA
fYear
1991
fDate
23-27 Sep 1991
Lastpage
37803
Abstract
Discusses issues of current PLD parameter specification. It covers two specific areas; standardization of PLD specifications and data that could be provided to enhance designers knowledge
Keywords
logic arrays; logic design; standardisation; PLD parameter specifications; knowledge enhancement; logic design; standardization; Circuits; Cities and towns; Clocks; Flip-flops; Frequency; Programmable logic devices; Standardization; Temperature; Time to market; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Conference_Location
Rochester, NY
Print_ISBN
0-7803-0101-3
Type
conf
DOI
10.1109/ASIC.1991.242953
Filename
242953
Link To Document