Title :
An integrated memory self test and EDA solution
Author :
Adams, R. Dean ; Abbott, Robert ; Bai, Xiaoliang ; Burek, Dwayne ; MacDonald, Eric
Author_Institution :
Magma Design Autom., Burlington, VT, USA
Abstract :
Memory built-in self-test (BIST) is a critical portion of the chip design and electronic design automation (EDA) flow. A BIST tool needs to understand the memory at the topological and layout levels in order to test for the correct fault models. The BIST also needs to be fully integrated into the overall EDA flow in order to have the least impact on chip area and have the greatest ease of use to the chip designer.
Keywords :
built-in self test; electronic design automation; integrated circuit design; integrated memory circuits; EDA solution; built-in self-test; chip design; electronic design automation flow; fault models; integrated memory self test; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Design automation; Electronic design automation and methodology; Geometry; Random access memory; Redundancy; Shape;
Conference_Titel :
Memory Technology, Design and Testing, 2004. Records of the 2004 International Workshop on
Print_ISBN :
0-7695-2193-2
DOI :
10.1109/MTDT.2004.1327990
