1 Gbit/s serial data link using multi level signaling for fast readout front end or 3D-IC applications

Author

Bechetoille, E. ; Contardo, D. ; Lamouret, Mila ; Mathez, H. ; Zoccarato, Y.

Author_Institution

IPNL, Univ. de Lyon, Villeurbanne, France

fYear

2011

fDate

23-29 Oct. 2011

Firstpage

1523

Lastpage

1529

Abstract

A high-speed serial link has been developed for data acquisition for s-LHC experiment upgrade at CERN or between tiers in 3D-IC application. To reduce the required bandwidth of the channel for a given bit rate and the maximum on-chip clock frequency a current multi level signaling was used. The circuit specifications concerning the number of analog levels used (Pulse Amplitude Modulation 16-bit) were inspired by the 10GBASE-T standard in current mode. The circuit frequency is 250 MHz for a 1Gbit/s data transmission. The analog and digital voltage supply is 1,6 V. This data link is implemented in IBM 130 nm 8RF CMOS process.

Keywords

data acquisition; data communication; high energy physics instrumentation computing; pulse amplitude modulation; readout electronics; 10GBASE-T standard; 3D-IC application; IBM 8RF CMOS process; analog levels; analog supply; analog-digital voltage supply; bit rate 1 Gbit/s; circuit frequency; circuit specification; data acquisition; data transmission; fast readout front end; frequency 250 MHz; high-speed serial data link; maximum on-chip clock frequency; multilevel signaling; pulse amplitude modulation; sLHC experiment upgrade; size 130 nm; voltage 1 V; voltage 6 V; Capacitance; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2011 IEEE

Conference_Location

Valencia

ISSN

1082-3654

Print_ISBN

978-1-4673-0118-3

Type

conf

DOI

10.1109/NSSMIC.2011.6154363

Filename

6154363