Novel SiGeC channel heterojunction PMOSFET

Author

Ray, S.K. ; John, S. ; Oswal, S. ; Banerjee, S.K.

Author_Institution

Microelectron. Res. Center, Texas Univ., Austin, TX, USA

fYear

1996

fDate

8-11 Dec. 1996

Firstpage

261

Lastpage

264

Abstract

The fabrication and characterization of heterojunction PMOSFETs with strain-engineered Si/sub 1-x-y/Ge/sub x/C/sub y/ channel is reported for the first time. The study has demonstrated the performance enhancement of partially strain compensated Si/sub 0.793/Ge/sub 0.2/C/sub 0.007/ MOSFET over fully-strained metastable Si/sub 0.8/Ge/sub 0.2/ channel. Complete strain compensation by incorporating higher amounts of C (Ge-to-C ratio=10:1), however, results in the degradation of device characteristics as compared to the Si/sub 1-x/Ge/sub x/ sample.

Keywords

Ge-Si alloys; MOSFET; internal stresses; semiconductor growth; semiconductor heterojunctions; semiconductor materials; vapour phase epitaxial growth; Si/sub 0.793/Ge/sub 0.2/C/sub 0.007/; Si/sub 0.793/Ge/sub 0.2/C/sub 0.007/ MOSFET; SiGeC channel heterojunction PMOSFET; UHV CVD epitaxial growth; device characteristics degradation; output characteristics; partial strain compensation; performance enhancement; saturation characteristics; strain-engineered Si/sub 1-x-y/Ge/sub x/C/sub y/ channel; Capacitive sensors; Fabrication; Heterojunctions; MOSFET circuits; Metastasis; Photonic band gap; Rough surfaces; Semiconductor films; Surface roughness; Surface topography;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1996. IEDM '96., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-3393-4

Type

conf

DOI

10.1109/IEDM.1996.553580

Filename

553580