Title :
A statistical strategy for directing process capability improvement efforts
Author :
Hirschman, K.D. ; Fennelly, T.J., Jr.
Author_Institution :
Dept. of Microelectron. Eng., Rochester Inst. of Technol., NY, USA
Abstract :
A statistical strategy which can be used to direct process capability improvement efforts is presented. This method is an extension of Quality Engineering by Design (QED) techniques, and incorporates both process simulation techniques and product manufacturing data. The resulting combination provides process engineers and management in a manufacturing environment with a useful weapon against variation. The focus is on reducing process variation in order to achieve device performance specifications. A case study is presented on the variation reduction of the nMOS threshold voltage (Vtn) in the RIT CMOS process. The end result is a plan which will determine where variation reduction efforts will be most rewarded, and possible strategies which can be used to achieve the required product quality
Keywords :
CMOS integrated circuits; integrated circuit manufacture; quality control; semiconductor process modelling; statistical analysis; QED; Quality Engineering by Design; RIT CMOS process; microelectronics; nMOS threshold voltage; process simulation; process variation; product manufacturing; statistical strategy; CMOS process; Data engineering; Design engineering; Engineering management; Environmental management; MOS devices; Manufacturing processes; Threshold voltage; Virtual manufacturing; Weapons;
Conference_Titel :
Semiconductor Manufacturing, 1995., IEEE/UCS/SEMI International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-2928-7
DOI :
10.1109/ISSM.1995.524355