A Multiplying Digital-to-Analog Convertor (MDAC) by Charge-Domain Operation

Author

Ikari, Junko ; Nagazumi, Yasuo ; Nakamura, Shinji

Author_Institution

Tamagawa Univ., Machida

fYear

2007

fDate

14-16 March 2007

Firstpage

745

Lastpage

749

Abstract

A multiplication type D/A convertor based on the new principles of charge-domain operations is proposed. The D/A convertor has a linear structure of overlapping gates. The design was fabricated by a standard 1.5 um CMOS process. Evaluation results of the two types of D/A conversion experiment are presented. By simple charge accumulation a relatively high, more than 11-bit, resolution is observed. For a successive charge splitting type D/A conversion, although our current evaluation results only show 5-bit resolution, we found possible clues for future improvements.

Keywords

CMOS integrated circuits; digital-analogue conversion; integrated circuit design; CMOS fabrication; charge accumulation; charge splitting; charge-domain operation; digital-to-analog convertor design; multiplication-type D/A convertor; overlapping gates; size 1.5 mum; Analog circuits; CMOS process; Character generation; Charge transfer; Converters; Electrons; Geometry; Routing; Signal processing; Voltage; D/A convertor; charge splitting; charge transfer; charge-domain;

fLanguage

English

Publisher

ieee

Conference_Titel

Information Sciences and Systems, 2007. CISS '07. 41st Annual Conference on

Conference_Location

Baltimore, MD

Print_ISBN

1-4244-1063-3

Electronic_ISBN

1-4244-1037-1

Type

conf

DOI

10.1109/CISS.2007.4298406

Filename

4298406