DocumentCode :
3352568
Title :
Requirements for contamination control in the G-bit era
Author :
Kitajima, Hiroshi ; Shiramizu, Y.
Author_Institution :
ULSI Device Dev. Labs., NEC Corp., Kanagawa, Japan
fYear :
1995
fDate :
17-19 Sep 1995
Firstpage :
56
Lastpage :
59
Abstract :
In future G-bit DRAM fabrication, the particle density on wafers will be seriously increased. This is because the deposition velocity of particles smaller than 0.1μm drastically increases, and is further accelerated by the electrostatic potential of wafers. The lower limit of the conventional cleanroom cleanliness will be class 0.1-1 level, by dust generation from people. This fact leads us to the minienvironment fab system with automated I/O. In minienvironment systems, however, organic contamination will be a serious problem. Box material, plasticizer and anti-oxidizing agent must be reexamined from the viewpoint of organic contamination control
Keywords :
DRAM chips; clean rooms; integrated circuit technology; surface contamination; technological forecasting; DRAM fabrication; G-bit era; anti-oxidizing agent; automated I/O; box material; clean rooms; contamination control; dust; electrostatic potential; minienvironment fab systems; organic contamination; particle density; people; plasticizer; wafers; Contamination; Electrostatics; Geometry; Laboratories; Manufacturing; National electric code; Production; Random access memory; Ultra large scale integration; Velocity control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing, 1995., IEEE/UCS/SEMI International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-2928-7
Type :
conf
DOI :
10.1109/ISSM.1995.524359
Filename :
524359
Link To Document :
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